I am working on a project and trying to maximize sample rate from an external A/D. I started with 8-bit samples (parallel) from external IO pins, and now trying to increase to 10 bits. I see my maximum clock rates drop dramatically when using NextPNR to route - the bulk of the increase is due to long net routes. Is there a good method anyone can recommend to determine which combination of IO pins to use to achieve shorter routes? Or some method of using constraints? Thanks for any ideas!