Creating a design without the hardware?


I have been searching for an FPGA development platform, and it appears that (unlike many FPGA boards) the TinyFPGA AX1 is available for purchase. It is small on logic, and I’m not sure it will hold my design.

I set out to create the design before ordering any hardware. Following the A Series User Guide, I downloaded and installed the Lattice Diamond software.

I have it licensed and running, but the from the tutorial and the software it is not clear how to proceed without the hardware connected. Is it possible to design without the hardware attached?


I think so…
If you open up the example project and then click on the “JEDEC file” in Diamond, it should create a .jed file in the impl subfolder.
The .jed file is what you’d program the AX with, if you had one…


Thanks! I got it going. The most important step is running the correct executable. When Windows installed the Diamond software it only offers one app “Diamond Programmer” on the start menu. That is not the correct one for design. I clicked on the start menu link option for Open Folder, went up a level, and found the main diamond program. I see now that Windows will only show it on the start menu if you type “Lattice Diamond”


I’ve got “Lattice Diamond” pinned to my start menu. (Though I haven’t programmed my AX1 for years :cry: My plan was/is to build a breakout board for a VRAM in a ZIP, but I seem to have lost the knack of drilling holes in PCBs.)
Its target is C:\lscc\diamond\3.10_x64\bin\nt64\pnmain.exe
(I’m working my way though ‘Designing Video Game Hardware in Verilog’, though I’m ‘running’ the code on the simulator at


I’m somewhat familiar with process, having done Verilog design and simulation many years ago.
I’m not familiar with the Lattice tools, though, which seem to be based on Mentor.
I opened template_a2 and TinyFPGA_A2.v and changed the target to LCMXO2-256HC.

I wanted to simulate the Verilog of this example just to verify everything was functional, I expected to see the counter waveforms in the simulator. From Diamond, I can use Tools / Modelsim Lattice Edition, which opens a new window. If I select Simulation / Start Simulation, it brings up another dialog with a tree view of library items. The OK button is grayed out, though.

In the transcript, I find:
# Reading pref.tcl
# Load canceled

I must be missing something. Is there a full walk-through tutorial for this tool chain?

I also tried Diamond / Tools / Simulator WIzard. I created a project name, chose RTL as the process stage, I did not add a test bench since this LED blink should operate standalone - without any external input. It went through a Parse HDL Files for simulation, and indicated TinyFPGA_A2 was the Top Module.
There was a summary dialog with Finish button.
The simulator runs, and shows waveforms. The only signal is the clock - clk.
In the transcript:
# ** Warning: (vsim-3722) C:/Data/DEV/FPGA/TinyFPGA/TestProject/TinyFPGA_A2.v(58): [TFMPC] - Missing connection for port ‘SEDSTDBY’.