Cross-posting from: https://forum.mystorm.uk/t/dvi-hdmi-pmod/505
The Lattice iCE40 FPGAs have LVDS inputs, but they don’t actually have LVDS outputs - they ‘emulate’ LVDS outputs using two LVCMOS outputs and three external resistors, which “should be surface mounted as close as possible to the FPGA output pins”!
I have had a go at putting together a DVI / HDMI Pmod by level-shifting 3.3V down to 1.2V using a SN74AXC8T245, and then feeding that (AC-coupled) into a PTN3366 to achieve proper TMDS / CML outputs:
My monitor recognises the signal as 640x480 @ 60Hz, but has trouble keeping sync, and I am getting some weird interference / glitchy vertical lines - my feeling is that this may be due to high-frequency ‘reflections’ and requires better hardware design… my hope is that someone will spot something in the code that may help?
This is based on Mike Field’s work (see below lnks) and uses the iCE40’s DDR output mode to get 250MHz outputs from a 125MHz clock…
I have a couple of these Pmod boards to spare if anyone else wants to take a crack at it?