Minimizing Power Consumption on BX


#1

Hey all! I’m using a TinyFPGA BX for some work with my research group, and I had a couple questions regarding low-power operation. I’ve been consulting the Lattice datasheet for low-power operation, but I still have some lingering questions. I’ve been using a PLL to generate a 10MHz clock with icegate enabled, but I can’t seem to get current consumption to go below ~3.1 mA. I’ve been using the example code from the TinyFPGA guide here (https://tinyfpga.com/bx/guide.html).

First, what are the states of the pins if they aren’t specifically referenced as IO in the top.v file? Would it be best to manually set all output pins to logic low, or are they gated in some way if they aren’t specifically declared in the code?

Second, is there any way of disabling the 16MHz clock onboard the TinyFPGA device? I know that draws 1.3 mA, and I was curious if I’d be able to provide my own clock to the device using something with a little less power.

Just trying to see what I can do to really bring the power down as much as I can on the device. Of course, the best option would be to just buy and ice40 chip and build my own device, but for the time being I’m just trying to see how efficient I can get my BX.