TinyFPGA based on iCE40-UP5K-SG48


#21

Hi Glanzi,

Thanks for sharing. Did you publish your work somewhere? I updated my board and ordered a new version yesterday(where I changed the footprint of the SPI chip).


#22

I made the KiCad project files available under https://github.com/glanzi/TinyFPGA-UP on GitHub. The main schema is based on the official breakout board from Lattice iCE40 UltraPlus Breakout Board. I will report back, once i have some further information about my progress.


#23

Tanks for sharing. I discovered that I messed up my SDI / SDO lines for the SPI flash(while comparing)!


#24

gone very quiet…

is new board assembled? available even?

cheers!


#25

Hi,

The PCB got lost somehow. I ordered a new set of pcb from oshpark (I really like the look and quality of te pcbs.

Meanwhile I continued doing some work on the USB stack and been using migen!


#26

Hello Dear All.
Thank you for your idea. I need to develop Tiny FPGA and R820T2 RF tuner for software defined radio.Please give your advice and Can you share a schematic design with Kicad?
Thank you!


#27

Have you looked at:

http://ebrombaugh.studionebula.com/radio/iceRadio/index.html


#28

Thank you!am looking the document.if you have any plz share!my objective is FPGA based SDR.can you share your email or blog?


#29

I don’t understand what you are asking for. I have not built or used an SDR board, but have looked into it a bit.

Here is a blog entry by @afiskon (in Russian) on building and use the iceradio board

https://eax.me/r820t2-module/


#30

Still waiting…


#31

There is no good PCB service in Europe?

Also… very much looking forward to seeing how your project goes.


#32

I have used https://aisler.net/ in the past few months but I was not to happy about the look&feel of the board. That said my silk screen can use some :smiling_face_with_three_hearts: This is a rev 0x03 of the board


#33

Hi,

Yesterday I did my third attempt at assembling the board. The OSHPARK PCB never arrived so I had to do it with ones from aisler. of the 9 boards I endded up ordering 3 did not pass electric check and are marked with x-out.

On the image you see some pads on the top board don’t shine. I think I might have been unlucky(aisler offered reduction on my next order).

This is after applying the solder

A assembled the board (got 3v3 and 1v2) and the power led is working.

The oscillator also produces the expected 16 Mhz

and I can see a 12.5 MHz signal on the SPI data line. I therefore think the FPGA is most likely working.

I created programming jig (to program the SPI flash) using one of the broken boards and some test pins(different from what I ordered before).

Soldered wires where the SPI flash should have been (as they are connected to the programming pins)

The finished programming jig looks like this.

I can now mount my soldered board on top of the programming jig and attach a bus pirate for the programming part:

I also have an option to keep the reset button pressed (to keep the FPGA in reset ?)

The next step is to program the SPI with a blinky using the bus pirate and flashrom. So far flashrom was not able to detect my chip.


#34

Great progress! I’m on the edge of my seat over here.


#35

Hi,

Today I finally spent some time on the project and thinking about the next step.

As state the problem is that I can not program the flash currently because the FPGA itself is trying to boot from the flash and is generating the clock.

I investigated the possibility to boot the FPGA into slave mode. This can be done by pulling down the CS line (compared to pullup) when booting into FPGA master mode. The good news is that this pin is the slave select line that was exported to the programming header anyway.

With a 1k5 pulldown (the 10K pullup is still present on the board) I can indeed see that the board no longer pollutes the SPI clock line.

The bad news is that to program the SPI I will need the SS line low. I have a few options

  1. Power the FPGA into slave mode and use flashrom afterwards to flash the SPI (This currently does not work as flashrom is also controlling the power to the FPGA)… hope that the SPI flash programming won’t get the FPGA into a working state

  2. Well. keep the FPGA in slave mode and use a TinyFPGA-BX(or similar) to push the data into the my fpga over SPI. The SPI protocol itself is ratter simple (described in http://www.latticesemi.com/dynamic/view_document.cfm?document_id=46502 ) . This can be nice while developing the the bootloader.

https://zipcpu.com/blog/2018/08/16/spiflash.html
bootloader “development” probably means gettingthe code from the fomu project https://www.crowdsupply.com/sutajio-kosagi/fomu


#36

Phew… my ass had gone to sleep with all my edge of the seat sitting.

How is this different from the TinyFPGA BX? How is that device initially programmed?


#37

Just hold the CRESET_B pin Low, and you can do with the SPI pins what you want. The FPGA holds all the IO pins in tristate while the reset is low.


#38

Hi @mnemonix

Indeed! when holding in reset (and forcing SS low) I am now getting my flash detected!

flashrom p1.0-22-g0bfa819-dirty on Linux 4.18.0-17-generic (x86_64)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found SST flash chip “SST25VF016B” (2048 kB, SPI) on buspirate_spi.
No operations were specified.


#39

I was able to flash the bit file to flash but it ain’t blinking yet… I do see some difference in the board compared to when it was not programed (the user led is no longer on by default) hence getting close

I copied code from upduino but perhaps I need to change the makefile to account for a different package or similar. At first I suspected something to be wrong with the clocks but also combinatorial logic does not apply

code here

Flashing using flashrom does take 7 minutes…


#40

In my opinion you need to swap the SDI and SDO connections to the Flash chip. Otherwise the FPGA can not access the Flash in Master mode, and maybe also programming of the Flash will go faster.

Andy