TinyFPGA EX Preview


#1

I’m working on expanding the TinyFPGA line-up with an additional series with new features. This is a significantly more complicated and capable board than the A- and B-series boards. It will be available sometime in the first half of 2018.

The heart of the TinyFPGA EX boards is the ECP5 FPGA from Lattice. I’ll release more details as prototypes come back and specifications start firming up.

Until then, here’s a render of the board in its current form:


#2

Is that an SD card slot!?


#3

Current specs:

  • Micro SD Card Slot (fully connected to all SD card interface signals)
  • 8 Megabytes HyperRAM (low pin count DDR)
  • ECP5 FPGA with 12k, 25k, or 45k LUTs
  • 8 Megabytes SPI Flash
  • 3.3v switching power supply for IOs
    • 2.5v LDO for FPGA aux rail
    • 1.8v LDO for HyperRAM and associated FPGA IOs
  • 1.1v switching power supply for FPGA vcore (up to 3 amps…)
  • 16MHz MEMS clock
  • Micro USB connector
  • 42 GPIOs (not shared with SPI, JTAG, or any other special pin)
  • JTAG, SPI, USB configuration interface test pads on bottom

#4

I posted the project to hackaday.io: https://hackaday.io/project/28266-tinyfpga-e-series

I’ll be updating the hackaday.io project page as new progress is made.


#5

Cool. I could use a small board with a 1.8V regulator to implement a 1.8V MIPI RFFE protocol without level translators. If VDD to the GPIO banks was connected thru a 0 ohm resistor, it would be nearly perfect because it would be very easy to route the 1.8V over. Will this have a PLL to run the core at some multiple of 16MHz?


#6

It will have up to 4 PLLs, so you will have a lot of options for clocks. The 16MHz clock source is not set in stone, I have some flexibility in the clock frequency I pick. The prototype boards I ordered for manufacture will have 16MHz clocks on them.

I think I would have to change the board too much in order to support 1.8v GPIOs. I’ll take a look at it, but no promises. I already ordered prototypes and they were so darn expensive.

On the other hand…this isn’t the last board I’ll be making with the ECP5 FPGA. I’m planning a larger board that may have programmable voltage regulators for the IO banks. This would let you change GPIO voltages dynamically. That future board will be something like 4" x 4".