I’ve put my work into a repo here - https://github.com/davidthings/tinyfpga_bx_usbserial
Since changing to NextPNR and making a few other tweaks, I have built several miniprojects with this code and have not seen the dreaded “module doesn’t boot” or “module doesn’t create a USB device” problems that the arachne pnr tool presented. Fingers crossed.
As you can read in the repo’s readme, there is one major bug remaining (that I can see) and one major issue.
The bug is that the USB side of the implementation doesn’t like transfers of more than 32bytes. Try to send longer messages and the interface locks up (although it does repair itself for the next call). For the original implementation there was no need for longer transfers, and I’m guessing this may be rather a simple fix, however I’m very inexperienced with USB internals, so I wasn’t able to immediately see what was wrong.
The major issue is that for my needs I replaced the original front end with a streaming pipeline front end for maximum transfer speed (one transfer per clock). This may not suit all users because implementing these streaming pipelines is a head-exploding nightmare. Feel free to create an alternative. I realize that a better approach would have been to just work with the existing repo, keeping the existing interface then switching to a pipeline, but at the time I really thought it wasn’t going to work, and I wanted to get some pipeline practice so we end up here.
Finally, I am far from an expert Verilogger (or anything else FPGA), so please, any comments or criticisms will be happily received.