Using hardend SPI on TinyFPGA A2


Hi there
The TinyFPGA AX, in special A2 uses a FPGA from LATTICE with hardend (build in) SPI master or slave system. (Also I2C and some more are available)
so I would like to know if there is some hint for using this parts on the MACHXO2 1200 device used with TinyFPGA A2.
Would be a real fine project because that would help a lot of people getting forward with the hard wired stuff on theses LATTICE FPGAs.
If I get some help I would appreciate this. I wil try to but my eyperience on git.

Regards, Harald


Been working doing just that but have run into a road block… I have a lot of detail and a test build over in another post:


Hey have you found any details or hints/guides on how to implement the SPI properly? I’m currently trying to do this in a project with the MachXO2 fpga as a slave device, but it’s not able to read from the slave properly.



Hi there
Up to now I am not very far. In the moment I try to figure out what can be the reason. Reveal failed for whatever reason and so I will start to create a testbench.
Lets stay in touch.
Regards, Harald


If you need an example of using the MachXO2’s EFB Slave SPI, you can take a look at the test build I put in Github:

I has issues early on but figured out that my Wishbone implementation was the cause. The example has been updated to fix those early issues.


Hi thanx.
I now figure out what you have implemented. In the first place I see some initialization which also should be able to do with the IPexpress module. Is there any reason you skipped that and did it by hand?

Regards, Harald


The state machine is an implementation of what is provided on “Figure 18. SPI Slave Read/Write Example (via WISHBONE) - Production Silicon” of the “Using User Flash Memory and Hardened Control Functions in MachXO2 Devices Reference Guide”. Technically some of the configuration writes are redundant but since writing the SPI Control 2 register causes the SPI core to reset in the EFB, I would speculate that doing so would help recover from any issues on the SPI interface. For example if you didn’t properly receive all eight clocks for a give byte it might help you recover when the slave select is negated.


Hi Luc
I have one more short question. What is the directory I have to fill in for BASE_MAP:


Launch Simulation Using Active-HDL:

  1. Change the BASE_PATH attribute in the file to the location of the files
  2. Launch Active HDL
  3. Execute .do macro to compile and run the test
    Tools -> Execute macro...

        Navigate to the [BASE_PATH]/sim/tb/
        Select file and Click -> "Open"

I see in the that there is a cd command to switch to the lib path but there is none in the file structure. Do I have to add a lib directory and copy some files? If so which?

Thanx for help
Regards, Harald


[BASE_PATH] just represents the root of where the files are. The .do file needs to know the absolute path, which I set using a variable called BASE_PATH, since ActiveHDL will likely not have been launched in the same directory as the files.

You may have to create the “lib” directory. I don’t recall if ActiveHDL will create it. The files that end up in lib are just the compiled output of the simulator. currently has the following as the first line. This is what will need to be adjusted to the location of where you put the files:

set BASE_PATH “C:\Temp\MachXO2-SpiTestBuild”


fine. I can see all signals.


I see all I think I should see in the simulation. The SPI bus is answering with the PROTOCOL and REVISION as expected. But in silicon I see a different answer. In fact its only driving MiSO high. Up to now I do not find the reason for this. Maybe you have some hints.
Regards, Harald


I figured out that I do my wiring with the board layout from git but this is A1. Is there a layout for AX2 also. I am not sure if this is different but what I see that there are some LEDs implemented which are not in A1.
Regards, Harald


Make sure you are using the latest code from github. The latest version does work on a AX2 board using a Raspberry Pi Zero as the SPI master. There are a lot of unknowns from my perspective so a quick overview of how you are testing and how things are configured might help.


The AX1/2 schematics and layout on Github are not the latest. The current boards have 2 LEDs, one on the power input and one on Board Pin “1”. I believe otherwise they are the same.


Hi LucAce
Thanks for quick answer. I will figure out where the LEDs are connected.
Regards Harald