Hi all the FPGA masterminds. First time post here. Hi
I am having issue with this warning using Icecube2 with synplifypro
Warning FX689 Unbuffered I/O which could cause problems in P&R
the code
module test(input CLK,
output reg clkout);
reg [5:0] Clk_Count;
always @(posedge CLK)
begin
Clk_Count <= Clk_Count+1;
clkout <= Clk_Count[5];
end
endmodule
module top (input CLK, // 16MHz clock
output USBPU, // USB pull-up resistor
output PIN_24);
// drive USB pull-up resistor to '0' to disable USB
assign USBPU = 0;
test xtest(.CLK(CLK),
.clkout(PIN_24));
endmodule
Thank you for any help
Joe